The present invention relates to a high-frequency power amplifier, and more particularly to a high-efficiency power amplifier formed of amplifying devices operating in a high frequency region and an impedance matching circuit coupled to the output terminals of the amplifying devices.
In order to operate a high-frequency power amplifier efficiently, there is known a technique of providing the amplifier with a matching circuit which is designed in consideration of the impedance for the high-frequency signal and its harmonics to be amplified. For example, a field effect transistor (FET) as an amplifying device can ideally behave a 100% drain efficiency by having a load impedance of zero for even harmonics and a load impedance of infinity for odd harmonics.
FIG. 6(a) shows the conventional arrangement of a high-frequency power amplifier provided with the above-mentioned impedance matching circuit for harmonics, in which an FET 67 as an amplifying device is connected on its output with a resonance circuit 68, which behaves parallel resonation at the fundamental wave of the signal to be amplified, through a transmission line 69 having a length equal to the quarter wavelength of the fundamental wave. With the gate voltage being set to the pinch-off point, the amplifying device operates for a large-swing input signal to have a drain voltage Vd and drain current Id as shown in FIG. 6(b). Namely, the drain voltage Vd has a rectangular waveform including the fundamental wave and odd harmonics and the drain current Id has a half-wave rectified waveform including the fundamental wave and even harmonics. Since the voltage and current do not exist at the same time, no power is dissipated in the device, resulting in a 100% operational efficiency.
However, practical amplifiers involve a device loss and circuit loss, particularly in the high-frequency region, and the above-mentioned ideal operation is not yet accomplished. Specific examples of the circuit arrangement of the amplifier operating in a high-frequency region of several hundreds MHz and above, which use a distributed-parameter transmission line to control the second harmonic, are proposed in Japanese Patent Application Laid-Open Nos. 58-159002 and 58-116808. Another example which is based on the parallel operation of two amplifying devices is described in the proceedings of the 1989 spring convention of The Institute of Electronics, Information and Communication Engineers of Japan, Paper No. SC-9-5, pp. 2-708 and 2-709.
A typical use of high-efficiency power amplifiers is for RF transmission amplifiers, in which large power output is required as well as high operational efficiency in many cases. Conventional techniques for getting a large power output include the parallel operation of two amplifying devices in in-phase mode and the push-pull operation of two amplifying devices in opposite phase mode.